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<span id="openzim-page-title" class="mw-page-title-main"><span class="mw-page-title-main">Advanced Matrix Extensions</span></span>

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<p><b>Advanced Matrix Extensions</b> (<b>AMX</b>), also known as <b>Intel Advanced Matrix Extensions</b> (<b>Intel AMX</b>), are extensions to the <a href="X86" title="X86">x86</a> <a href="Instruction_set_architecture" title="Instruction set architecture">instruction set architecture</a> (ISA) for <a href="Microprocessor" title="Microprocessor">microprocessors</a> from <a href="Intel" title="Intel">Intel</a> designed to work on <a href="Matrix_(mathematics)" title="Matrix (mathematics)">matrices</a> to accelerate <a href="Artificial_intelligence" title="Artificial intelligence">artificial intelligence</a> (AI) and <a href="Machine_learning" title="Machine learning">machine learning</a> (ML) workloads.<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup>

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<div class="mw-heading mw-heading2"><h2 id="Extensions">Extensions</h2></div>

<p>AMX was introduced by Intel in June 2020 and first supported by Intel with the <a href="Sapphire_Rapids_(microprocessor)" class="mw-redirect" title="Sapphire Rapids (microprocessor)">Sapphire Rapids</a> <a href="Microarchitecture" title="Microarchitecture">microarchitecture</a> for <a href="Xeon" title="Xeon">Xeon</a> servers, released in January 2023.

<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> It introduced 2-dimensional <a href="Processor_register" title="Processor register">registers</a> called tiles upon which accelerators can perform operations. It is intended as an extensible architecture; the first accelerator implemented is called tile matrix multiply unit (TMUL).

</p><p>In Intel Architecture Instruction Set Extensions and Future Features revision 46, published in September 2022, a new AMX-FP16 extension was documented. This extension adds support for <a href="Half-precision_floating-point_format" title="Half-precision floating-point format">half-precision floating-point</a> numbers. In revision 48 from March 2023, AMX-COMPLEX was documented, adding support for half-precision floating-point <a href="Complex_numbers" class="mw-redirect" title="Complex numbers">complex numbers</a>. Both extensions are available in the <a href="Granite_Rapids" title="Granite Rapids">Granite Rapids</a> set of server processors (with AMX-COMPLEX support only being available in <a href="Xeon_D" title="Xeon D">Granite Rapids-D</a>

<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup>).

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<div class="mw-heading mw-heading3"><h3 id="Tile_matrix_multiply_unit">Tile matrix multiply unit</h3></div>

<p>TMUL unit supports <a href="Bfloat16_floating-point_format" title="Bfloat16 floating-point format">BF16</a> and <a href="INT8" class="mw-redirect" title="INT8">INT8</a> input types.

<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> AMX-FP16 and AMX-COMPLEX also add support for real and complex <a href="Half-precision_floating-point_format" title="Half-precision floating-point format">FP16</a> numbers. The register file consists of 8 tiles, each with 16 rows of size of 64 bytes (32 BF16/FP16 or 64 INT8 elements). The only supported operation is matrix <a href="Multiply%E2%80%93accumulate_operation" title="Multiply–accumulate operation"> multiply and accumulate (MMA)</a>, which is the extension of the <a href="Fused_multiply%E2%80%93add" class="mw-redirect" title="Fused multiply–add"> fused multiply–add (FMA)</a> operation for scalar values as applied to matrix operands:

</p><p><span class="mwe-math-element mwe-math-element-inline"><span class="mwe-math-mathml-inline mwe-math-mathml-a11y" style="display: none;"><math xmlns="http://www.w3.org/1998/Math/MathML" alttext="{\displaystyle C_{nm}=C_{nm}+\sum _{j=1}^{J}A_{nj}B_{jm}.}">

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<annotation encoding="application/x-tex">{\displaystyle C_{nm}=C_{nm}+\sum _{j=1}^{J}A_{nj}B_{jm}.}</annotation>

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</math></span><img src="./74c1dfb4e5eac1d871f8fd7d29e203da01807353.svg" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -3.338ex; width:26.729ex; height:7.676ex;" alt="{\displaystyle C_{nm}=C_{nm}+\sum _{j=1}^{J}A_{nj}B_{jm}.}" loading="lazy"></span><sup id="cite_ref-iaiseaffpr_4-1" class="reference"><a href="#cite_note-iaiseaffpr-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup>

</p><p>4th Gen Intel Xeon Scalable processor core can perform 2048 INT8 or 1024 BF16 operations per cycle:

<sup id="cite_ref-iaorm_10-0" class="reference"><a href="#cite_note-iaorm-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup> the maximal input sizes are <span class="mwe-math-element mwe-math-element-inline"><span class="mwe-math-mathml-inline mwe-math-mathml-a11y" style="display: none;"><math xmlns="http://www.w3.org/1998/Math/MathML" alttext="{\textstyle 16\times J}">

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<annotation encoding="application/x-tex">{\textstyle 16\times J}</annotation>

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</math></span><img src="./c431f4e7ab375fdd3c70f912bf550503faf928c5.svg" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -0.338ex; width:6.637ex; height:2.176ex;" alt="{\textstyle 16\times J}" loading="lazy"></span> for <span class="texhtml"><i>A</i></span> and <span class="mwe-math-element mwe-math-element-inline"><span class="mwe-math-mathml-inline mwe-math-mathml-a11y" style="display: none;"><math xmlns="http://www.w3.org/1998/Math/MathML" alttext="{\textstyle J\times 16}">

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<annotation encoding="application/x-tex">{\textstyle J\times 16}</annotation>

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</math></span><img src="./18f54fedc289c053a7734c85bdd4baa2bb368eea.svg" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -0.338ex; width:6.637ex; height:2.176ex;" alt="{\textstyle J\times 16}" loading="lazy"></span> for <span class="texhtml"><i>B</i></span>, where <span class="texhtml"><i>J</i></span> is 64 for INT8 and 32 for BF16. The matrix multiplication requires <span class="mwe-math-element mwe-math-element-inline"><span class="mwe-math-mathml-inline mwe-math-mathml-a11y" style="display: none;"><math xmlns="http://www.w3.org/1998/Math/MathML" alttext="{\textstyle 256J}">

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<annotation encoding="application/x-tex">{\textstyle 256J}</annotation>

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</math></span><img src="./5a477dea86c589498eb38050c9137f7696058e29.svg" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -0.338ex; width:4.959ex; height:2.176ex;" alt="{\textstyle 256J}" loading="lazy"></span> multiplication and <span class="mwe-math-element mwe-math-element-inline"><span class="mwe-math-mathml-inline mwe-math-mathml-a11y" style="display: none;"><math xmlns="http://www.w3.org/1998/Math/MathML" alttext="{\textstyle 256J}">

</mstyle>

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<annotation encoding="application/x-tex">{\textstyle 256J}</annotation>

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</math></span><img src="./5a477dea86c589498eb38050c9137f7696058e29.svg" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -0.338ex; width:4.959ex; height:2.176ex;" alt="{\textstyle 256J}" loading="lazy"></span> additions, thus performing <span class="mwe-math-element mwe-math-element-inline"><span class="mwe-math-mathml-inline mwe-math-mathml-a11y" style="display: none;"><math xmlns="http://www.w3.org/1998/Math/MathML" alttext="{\textstyle 512J}">

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<annotation encoding="application/x-tex">{\textstyle 512J}</annotation>

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</math></span><img src="./75523fd6c6caac7f7d46178340c53f93f02aacbf.svg" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -0.338ex; width:4.959ex; height:2.176ex;" alt="{\textstyle 512J}" loading="lazy"></span> operations in 16 cycles.<sup id="cite_ref-iaorm_10-1" class="reference"><a href="#cite_note-iaorm-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup>

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<div class="mw-heading mw-heading2"><h2 id="Software_support">Software support</h2></div>

<ul><li>Compiler and assembler support

<li><a href="GNU_Assembler" title="GNU Assembler">GNU Assembler</a> (GAS) initial support committed on 25 June 2020<sup id="cite_ref-18" class="reference"><a href="#cite_note-18"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-:0_14-1" class="reference"><a href="#cite_note-:0-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup></li></ul></li>

<li>Operating system support

<ul><li><a href="Glibc" title="Glibc">glibc</a> support for detecting AMX feature in CPUs committed on 25 June 2020<sup id="cite_ref-19" class="reference"><a href="#cite_note-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup></li>

<li><a href="Linux_kernel" title="Linux kernel">Linux kernel</a> support since version 5.16<sup id="cite_ref-20" class="reference"><a href="#cite_note-20"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup></li>

<li><a href="VMware_vSphere" title="VMware vSphere">VMware vSphere</a> support for AMX in virtual machines released in <a href="ESXi" class="mw-redirect" title="ESXi">ESXi</a> version 8.0u1 for VMs using Hardware Version 20<sup id="cite_ref-21" class="reference"><a href="#cite_note-21"><span class="cite-bracket">[</span>21<span class="cite-bracket">]</span></a></sup></li></ul></li></ul>

<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>

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<li id="cite_note-19"><span class="mw-cite-backlink"><b><a href="#cite_ref-19">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://sourceware.org/git/?p=glibc.git;a=commit;h=4fdd4d41a17dda26c854ed935658154a17d4b906">"x86: Detect Intel Advanced Matrix Extensions"</a>. 2020-07-02<span class="reference-accessdate">. Retrieved <span class="nowrap">2020-07-02</span></span>.</cite></span>

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<li id="cite_note-20"><span class="mw-cite-backlink"><b><a href="#cite_ref-20">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.phoronix.com/review/linux-516-features">"Linux 5.16 Features Include FUTEX2, Intel AMX, Folios, DG2/Alchemist, More Apple Silicon Support"</a>. <i><a href="Phoronix_Test_Suite#Phoronix_website" title="Phoronix Test Suite">Phoronix</a></i>.</cite></span>

</li>

<li id="cite_note-21"><span class="mw-cite-backlink"><b><a href="#cite_ref-21">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://earlruby.org/2023/08/accessing-sapphire-rapids-amx-instructions-on-vsphere/">"Accessing Sapphire Rapids AMX instructions on vSphere"</a>. <i>Earl C. Ruby III</i>. 2023-08-24.</cite></span>

</li>

</ol></div></div>

<div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2></div>

<ul><li><a rel="nofollow" class="external text" href="https://software.intel.com/sites/landingpage/IntrinsicsGuide/">Intel Intrinsics Guide</a></li>

<li><a rel="nofollow" class="external text" href="https://en.wikichip.org/wiki/x86/amx">Wikichip: Advanced Matrix Extension (AMX) - x86</a></li></ul>

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</style><div id="AMD_technology57" style="font-size:114%;margin:0 4em"><a href="AMD" title="AMD">AMD</a> technology</div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Software</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="AGESA" title="AGESA">AGESA</a></li>

<li><a href="AMDgpu_(Linux_kernel_module)" title="AMDgpu (Linux kernel module)">AMDgpu</a></li>

<li><a href="AMD_Software" title="AMD Software">AMD Software</a></li>

<li><a href="Vivado" title="Vivado">Vivado</a></li>

<li><a href="Xilinx_ISE" title="Xilinx ISE">Xilinx ISE</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Platforms</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Current</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<li><a href="GPUOpen" title="GPUOpen">GPUOpen</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Obsolete</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="AMD_Spider" title="AMD Spider">Spider</a></li>

<li><a href="AMD_Dragon" title="AMD Dragon">Dragon</a></li>

<li><a href="AMD_Horus" title="AMD Horus">Horus</a></li></ul>

</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Technology</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Cool'n'Quiet" title="Cool'n'Quiet">Cool'n'Quiet</a></li>

<li><a href="High_Bandwidth_Memory" title="High Bandwidth Memory">High Bandwidth Memory</a></li>

<li><a href="PowerNow!" title="PowerNow!">PowerNow!</a></li>

<li><a href="AMD_PowerPlay" title="AMD PowerPlay">PowerPlay</a></li>

<li><a href="AMD_PowerTune" title="AMD PowerTune">PowerTune</a></li>

<li><a href="AMD_Turbo_Core" title="AMD Turbo Core">Turbo Core</a></li>

<li><a href="AMD_Wraith" title="AMD Wraith">AMD Wraith</a></li>

<li><a href="Virtex_(FPGA)" title="Virtex (FPGA)">Virtex</a></li>

<ul><li><a href="Ryzen_AI" class="mw-redirect" title="Ryzen AI">Ryzen AI</a></li></ul></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Instructions</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

</div></td></tr></tbody></table></div>

<div class="navbox-styles"></div><div role="navigation" class="navbox" aria-labelledby="Intel_technology56" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Intel_technology56" style="font-size:114%;margin:0 4em"><a href="Intel" title="Intel">Intel</a> technology</div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Platforms</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Centrino" title="Centrino">Centrino</a></li>

<li><a href="Centrino#Montevina_platform_(2008)" title="Centrino">Centrino 2</a></li>

<li><a href="Tablet_computer#Intel_tablet_platforms" title="Tablet computer">Tablet</a></li>

<li><a href="Ultrabook" title="Ultrabook">Ultrabook</a></li>

<li><a href="Intel_Skulltrail" title="Intel Skulltrail">Skulltrail</a></li>

<li><a href="Intel_Galileo" title="Intel Galileo">Galileo</a></li>

<li><a href="Intel_Edison" title="Intel Edison">Edison</a></li>

<li><a href="Intel_Curie" class="mw-redirect" title="Intel Curie">Curie</a></li>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Discontinued</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Common_Building_Block" title="Common Building Block">Common Building Block</a></li>

<li><a href="MultiProcessor_Specification" title="MultiProcessor Specification">MultiProcessor Specification</a></li>

<li><a href="Intel_Communication_Streaming_Architecture" title="Intel Communication Streaming Architecture">Intel Communication Streaming Architecture</a></li>

<li><a href="Intel_Inboard_386" title="Intel Inboard 386">Intel Inboard 386</a></li>

<li><a href="Intel_Play" title="Intel Play">Intel Play</a></li>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Current</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Advanced_Programmable_Interrupt_Controller" title="Advanced Programmable Interrupt Controller">Advanced Programmable Interrupt Controller</a></li>

<li><a href="Intel_Turbo_Boost" title="Intel Turbo Boost">Intel Turbo Boost</a></li>

<li><a href="Intel_Secure_Key" class="mw-redirect" title="Intel Secure Key">Intel Secure Key</a></li>

<li><a href="Intel_Management_Engine" title="Intel Management Engine">Intel Management Engine</a></li>

<li><a href="Intel_Active_Management_Technology" title="Intel Active Management Technology">Active Management Technology</a>

<ul><li><a href="Intel_AMT_versions" title="Intel AMT versions">AMT versions</a></li></ul></li>

<li><a href="High-bandwidth_Digital_Content_Protection" title="High-bandwidth Digital Content Protection">High-bandwidth Digital Content Protection</a></li>

<li><a href="Intel_High_Definition_Audio" title="Intel High Definition Audio">High Definition Audio</a></li>

<li><a href="Intel_Hub_Architecture" title="Intel Hub Architecture">Hub Architecture</a></li>

<li><a href="Intel_Rapid_Storage_Technology" title="Intel Rapid Storage Technology">Rapid Storage Technology</a></li>

<li><a href="SpeedStep" title="SpeedStep">SpeedStep</a></li>

<li><a href="Serial_Digital_Video_Out" title="Serial Digital Video Out">Serial Digital Video Out</a></li>

<li><a href="Host_Embedded_Controller_Interface" title="Host Embedded Controller Interface">Host Embedded Controller Interface</a></li>

<li><a href="Hyper-threading" title="Hyper-threading">Hyper-threading</a></li>

<li><a href="Platform_Environment_Control_Interface" title="Platform Environment Control Interface">Platform Environment Control Interface</a></li>

<li><a href="Intel_QuickPath_Interconnect" title="Intel QuickPath Interconnect">QuickPath Interconnect</a></li>

<li><a href="Platform_Controller_Hub" title="Platform Controller Hub">Platform Controller Hub</a></li>

<li><a href="System_Management_Bus" title="System Management Bus">System Management Bus</a></li>

<li><a href="Thunderbolt_(interface)" title="Thunderbolt (interface)">Thunderbolt</a></li>

<li><a href="Intel_Ultra_Path_Interconnect" title="Intel Ultra Path Interconnect">Ultra Path Interconnect</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Upcoming</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Silicon_Photonics_Link" title="Silicon Photonics Link">Silicon Photonics Link</a></li></ul>

</div></td></tr></tbody></table></div>

<div class="navbox-styles"></div><div role="navigation" class="navbox" aria-labelledby="Instruction_set_extensions509" style="padding:3px"><table class="nowraplinks mw-collapsible uncollapsed navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Instruction_set_extensions509" style="font-size:114%;margin:0 4em"><a href="Instruction_set_architecture" title="Instruction set architecture">Instruction set</a> <a href="Processor_supplementary_capability" title="Processor supplementary capability">extensions</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Single_instruction%2C_multiple_data" title="Single instruction, multiple data">SIMD</a> (<a href="Reduced_instruction_set_computer" title="Reduced instruction set computer">RISC</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="DEC_Alpha" title="DEC Alpha">Alpha</a>

<li><a href="Power_ISA" title="Power ISA">Power ISA</a>

<li><a href="SPARC" title="SPARC">SPARC</a>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Single_instruction%2C_multiple_data" title="Single instruction, multiple data">SIMD</a> (<a href="X86" title="X86">x86</a>)</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Bit_manipulation" title="Bit manipulation">Bit manipulation</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Instruction_set_architecture#Code_density" title="Instruction set architecture">Compressed instructions</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="ARM_architecture_family#Thumb" title="ARM architecture family">Thumb</a></li>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Security and <a href="Cryptographic_accelerator" title="Cryptographic accelerator">cryptography</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="VIA_PadLock" title="VIA PadLock">PadLock</a> (2003)</li>

<li><a href="AES_instruction_set" title="AES instruction set">AES-NI</a> (2008); ARMv8 also has AES instructions</li>

<li><a href="CLMUL_instruction_set" title="CLMUL instruction set">CLMUL</a> (2010)</li>

<li><a href="RDRAND" title="RDRAND">RDRAND</a> (2012)</li>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Transactional_memory" title="Transactional memory">Transactional memory</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Hardware-assisted_virtualization" class="mw-redirect" title="Hardware-assisted virtualization">Virtualization</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

</div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div>Suspended extensions' dates are <s>struck through</s>.</div></td></tr></tbody></table></div></div><div><div class="zim-footer">

This article is issued from <a class="external text" title="Last edited on 2025-08-06" href="https://en.wikipedia.org/wiki/?title=Advanced_Matrix_Extensions&oldid=1304460680">Wikipedia</a>. The text is available under <a class="external text" href="https://creativecommons.org/licenses/by-sa/4.0/deed.en">Creative Commons Attribution-Share Alike 4.0</a> unless otherwise noted. Additional terms may apply for the media files.

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